1. Field of the Invention
The present invention relates to an emulator, and particularly to an emulator having a real-time RAM monitor function. The term real-time RAM monitor function is a function for monitoring data stored in a memory (RAM), corresponding to respective addresses accessed by a microcomputer, a distinction between a read and write operations and the presence or absence of the read or write operation after the initiation of an emulating operation of the microcomputer without influencing on the speed of execution of a program upon emulating the microcomputer.
2. Description of the Prior Art
FIG. 2 is a block diagram showing a circuit configuration for implementing a real-time RAM monitor function of a conventional emulator. In the drawing, reference numeral 1 indicates a target microcomputer whose operation is emulated. Reference numeral 7 indicates a dual-port memory (corresponding to a memory having two pairs of buses used for an address signal, data and a control signal and a configuration accessible from the two pairs of buses respectively) for storing therein data indicative of data stored in a memory, a distinction between read and write operations of the target microcomputer and the presence or absence of the read or write operation thereof from the initiation of an emulating operation thereof. Reference numeral 2 indicates a write control circuit for controlling the writing of data into the dual-port memory 7. The write control circuit 2 is activated based on a control signal outputted from the target microcomputer 1 and a write operation inhibit signal outputted from a control microcomputer 5.
Reference numeral 8 indicates an address bus electrically connected to an address bus of the target microcomputer 1. Reference numeral 9 indicates a data bus electrically connected to a data bus of the target microcomputer 1. Reference numeral 10 indicates a control bus electrically connected to a control bus of the target microcomputer 1. The respective buses are electrically connected to their corresponding buses of the target microcomputer 1 and a customer system (not shown) with the target microcomputer 1 such as a rice boiler mounted thereon.
Reference numeral 11 indicates a signal line for transmitting a write control signal for controlling the writing of the data into the dual-port memory 7 from the write control circuit 2. Reference numeral 5 indicates a control microcomputer for reading measurement data stored in the dual-port memory 7. The stored measurement data may include data read or written by the target microcomputer, data indicative of whether the target microcomputer performed a read or a write operation, and data indicative of the presence or absence of read or write operations performed by the target microcomputer. The dual-port memory 7 is a memory provided to implement the real-time RAM monitor function. States of data on the data bus 9 and a control signal on the control bus 10 are written into the dual-port memory 7 under the control of the write control circuit 2. The write control circuit 2 and the dual-port memory 7 are electrically connected to the address bus 8, data bus 9 and control bus 10 so that a program developer may be unconscious of program coding and to avoid the influence exerted on the speed for the execution of a program by the target microcomputer 1.
The operation will next be described.
When the target microcomputer 1 is emulated, the write control circuit 2 generates a write control signal for the dual-port memory 7 from an address signal on the address bus 8 and the control signal on the control bus 10. Next, if the address signal on the address bus 8 indicates an address to be measured for the dual-port memory 7, then the write control circuit 2 outputs a write control signal to the signal line 11 to write the states of the data on the data bus 9 and the control signal on the control bus 10 into the dual-port memory 7 during write and read cycles of the target microcomputer 1. Thus, the data indicative of the result of measurements, which has been written into the dual-port memory 7, is read by the control microcomputer 5, using another port of the dual-port memory 7.
Owing to such an operational property, as the dual-port memory 7, a memory capable of performing only the write operation on the side thereof connected to the target microcomputer 1 and performing the read and write operations on the side thereof connected to another control microcomputer 5 is used in addition to a memory capable of performing the read and write operations from both ports thereof (the write operation on the control microcomputer 5 side is required upon initialization of the dual-port memory 7). As a modification of FIG. 2, a conventional example is known which adopts a configuration (cycle steal configuration) wherein the dual-port memory 7 is used as a normal single port memory and the result of measurements recorded in the single port memory is read out during a cycle in which the writing of data into the single port memory is not produced.
Since the real-time RAM monitor function of the conventional emulator is constructed as described above, a mass storage and high-speed memory is required to implement the real-time RAM monitor function with an increase in memory size of a microcomputer intended for development and evaluation of a program and the speeding up of a memory access operation of the microcomputer. However, since the high-speed dual port memory is small in capacity and high in cost as compared with the single port memory having the same access time as the high-speed dual port memory, it becomes hard to implement the real-time RAM monitor function. Since the achievement of high performance of the microcomputer as well as the adoption of a pipeline structure has increased the frequency of utilization of buses by the microcomputer, a problem arose in that the cycle steal configuration using the single port memory became also hard to realize the real-time RAM monitor function. This invention relates to an emulator.